报告摘要:

With recent flourishing of embedded media applications such as MPEG-2, H.264 and VC-1 encoders/decoders and wireless broadband communication infrastructures such as 3G, WiMax and Wi-Fi, real-time multimedia computing and communications on embedded systems becomes a major focus for both software and hardware designers. In the first part of the talk, the tradeoff between several design choices is analyzed, including the RISC processor, the SIMD processor and the dedicated ASIC. Then, in the second half of the talk, three emerging R&D efforts will be highlighted. First, the design of a multi-format video codec to strike a balance between flexibility and performance is addressed. This is motivated by the observation that there are multiple audio/video compression formats to be adopted currently. The trend of embedded processors is to support a wide range of audio/video formats such as MPEG-2, H.264 and VC-1. The design of multi-format codec demands a careful architecture consideration. Second, we consider the design of low-complexity integrated encryption and compression speech/video coding algorithms, which can significantly lower the power consumption of mobile terminals for the digital rights management (DRM). This gives an example of lower power design from an algorithmic level. Third, the rate-distortion-complexity (RDC) optimized video coding techniques are discussed. We emphasize a concept called “decoding-friendly encoder design”, where many computational heavy operations can be saved at the decoder end while high visual quality can still be preserved.

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