随着集成电路特征尺寸的不断减小，互连和纳米技术已成为当前超大规模集成电路发展的主要瓶颈之一。来自美国、中国的学者将就集成电路 互连领域和纳米技术的最新发展进行研讨，内容包括互连集成工艺、三维集成互连及可靠性、低K介质、铜籽晶层/扩散阻挡层技术、碳纳米管技术和新型非易失存储器技术等。
报告人顺序：
8:30 – 9:00 Registration
9:00 – 9:05 Welcome and Opening Remarks
9:05 – 9:50 Dr. Girish Dixit, Vice President of Novellus,
Advance interconnect integration technology
9:50 – 10:35 Prof. Paul Ho, University of Texas at Austin, USA
Development of 3D Interconnect and Reliability of TSV Structures
10:35 – 11:00 Coffee Break
11:00 – 11:45 Prof. Kaili Jiang, Tsinghua University, China
Super-aligned Carbon Nanotube Arrays, Films, and Yarns: A Road to Applications
13:30 – 14:15 Prof. D. Graves, UC Berkeley, USA,
Mechanisms of plasma damage to ultra-low K SiCOH dielectrics
14:15 – 15:00 Prof. T. S. Kuan, SUNY, USA
PVD barrier/wetting layers, Cu-alloy seed and viscous-flow narrow trench fill
15:00 – 15:30 Coffee Break
15:30 – 16:15 Prof. Xiangfeng Duan, UCLA, USA
Emerging Materials and Unconventional Processes for Future Electronics
16:15 – 17:30 Prof. Zhiping Yu, Tsinghua University, China
Towards CMOS BEOL-compatible Resistive Switching RAM (RRAMs)
