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报告题目:
Modelling and Simulation techniques for application development in the multicore era
 报告人:
Erik Hagersten
Professor
Uppsala University in Sweden
报告时间:
2013-04-25 09:00
报告地点:
FIT Building 2nd Floor Lecture Room
主办单位:
软件学院
  简介:
清华软件日特邀报告(一)
Speaker: Erik Hagersten
Title: Modelling and Simulation techniques for application development in the multicore era
时间:April25 09:00 -- 10:00 
地点:Beijing Tsinghua University FIT  Building 2nd Floor Lecture Room
 
Abstract
The recent trend in multicore architecture brings the promise of great performance at low cost. Just parallelize a single application or run several independent applications simultaneously in a throughput manner. However, multicores also introduce new bottlenecks that could result in slower-than-sequential execution, even if the application is embarrassingly parallel. Tuning for multicore requires insights into complex resource sharing (e.g., caches and bandwidth), thread interaction (e.g., synchronization, coherence and false sharing) and power consumption. Who cares how many FLOPS, MIPS, cores, or threads a chip has if its performance is limited by other factors?
 
In this talk I will advocate that simulation and modeling technology is needed, not only for hardware developers, but also for application developers. Such use requires two to three orders of magnitude lower overhead than traditional simulation technology. I will present statistical simulation methods, architecturally independent performance metrics and performance variability studies as three possible “simulation” technologies for such use.
 
CV Erik Hagersten
Erik Hagersten has held a professor chair in computer architecture at Uppsala University in Sweden since 1999 and is a member of the Royal Swedish Academy of Engineering Sciences. He has created the Uppsala Architecture Research Team (UART), consisting of three professors and about fifteen graduate students specializing in the ultrafast modelling technology of parallel memory systems, out-of-order execution processors and various power consumption models.   
 
Erik gained his initial interest in parallel architecture in the Dataflow project at MIT in the early 1980s and brought parallel processing and programming to Ericsson in the late 1980s. He coined cache-only memory architecture (and it brain-dead acronym COMA) while managing the architecture research group at the Swedish Institute of Computer Science (SICS) in the early 1990s. The Simics simulator by Virtutech, Inc. is another result from that group.
 
Erik was the chief architect for Sun Microsystem's high-end server engineering division in the US 1993–1999. He is the architect of the Sun WildFire and Sunfire Link products as well as the Sun Enterprise 15k/25k and UltraSPARC III and IV scalable coherence technology.
 
He founded Acumem AB in 2006, developing new modelling technology for multicore optimizations. Acumem was acquired by Rogue Wave Software Inc. in 2010. Erik served part-time as chief scientist for Rogue Wave Software Inc. 2010–2012. He has now returned to his professorship full time.
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