报告题目：基于FPGA高效神经网络加速的软硬件协同设计
报 告 人：汪玉
清华大学 电子工程系副教授、系党委副书记
报告时间：2017年9月7日 下午3:30
报告地点：刘卿楼402会议室
主 持 人：曾鸣 副教授
报告摘要：
Artificial neural networks, which dominate artificial intelligence applications such as object recognition and speech recognition, are rapidly evolving. For wide applicability of neural networks, customized hardware is necessary. FPGA can be an ideal platform for accelerating inferencing in neural network since it is programmable and can achieve much higher energy efficiency compared with general-purpose processors. We propose a complete design flow to achieve both fast deployment and high energy efficiency for accelerating neural networks on FPGA [FPGA ‘16, FPGA ‘17 best paper]. Deep compression and data quantization are employed to exploit the redundancy in algorithm and reduce both computational and memory complexity. Two architecture designs for CNN and DNN/RNN are proposed together with compilation environment. Evaluated on Xilinx Zynq 7000 and Kintex Ultrascale series FPGA with real-world neural networks, up to 15 times higher energy efficiency can be achieved compared with mobile GPU and desktop GPU. Finally, we will discuss the possibilities and trends of adopting emerging NVM technology for efficient learning systems to further improve the energy efficiency.
报告人简介：
从事高能效电路与系统研究，发表论文150余篇，IEEE/ACM杂志文章30余篇；谷歌学术引用2000余次。担任ACM SIGDA E-News主编，IEEE TCAD编委，DAC等领域顶级会议技术委员会委员，ACM杰出演讲者，ACM FPGA技术委员会亚太地区唯一成员。16年获得NSFC优秀青年基金。获得FPGA17、ISVLSI12最佳论文（均是大陆首次获奖），以及7次国际会议最佳论文提名。深度学习FPGA加速器在2016年知识产权转化入股北京深鉴科技有限公司，打造世界最先进的FPGA深度学习平台。

第237期“论坛”主请人联系方式：
曾鸣 13811165288  zengming@Tsinghua.edu.cn