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集成电路系列学术邀请报告第08期:Software Approach to SoC Design
全球变化科学紫荆论坛第431期:有机气溶胶冰云效应数值模拟的发展与探索
”城市前沿讲堂”第7期——可持续发展的国土空间形态
”城市前沿讲堂”第6期——城市基础设施灾害韧性管理
报告题目:
Optical and IC packaging for Data Rate 10Gb/s and Beyond
 报告人:
Dr. Yuheng Lee
Manager of OSA R&D and IC Packaging, BigBear Networks/Finisar
报告时间:
2007-06-01 10:30
报告地点:
4-402 Room, FIT Building
主办单位:
Research Institute of Information Technology (RIIT)
  简介:

2007年清华大学信息技术研究院系列学术报告4

 

Bio of Dr. Yuheng Lee

Work Experience:

2001-Now: BigBear Networks/Finisar, Manager of OSA R&D and IC Packaging - Advanced Optical and IC Packaging Development for 10Gb/s to 100Gb/s applications

1995-2001: Motorola Inc. Staff Engineer, Program Manager ? Wireless Component, RFIC and Smart Card Development

1992-1995: Argonne National Laboratories, Post-doctorial research fellow

 

Education:

1988-1992: Ph.D. in Materials Science and Engineering. American National Science Foundation Fellow, University of Illinois at Chicago      

1978-1986: BS & MS in Metallurgical Engineering Tsinghua University, Beijing

 

Abstract:

"Title -Data Rate 10Gb/s and Beyond - 40Gb/s RF Design and Packaging" To meet the demand for increasing bandwidth in communication infrastructures, OC-768 (40Gbs) systems are being developed beyond the already deployed OC-192 (10Gbs) infrastructures. Successful OC-768 system deployment requires overall technology advances in every aspect of the system development, including optical components, electronic integrated circuits, packages, and system engineering. For optical and electronics package development, the bandwidth required for first time extends into the millimeter wave region. The required bandwidth demands stringent interconnect designs for successful signal propagation. For low pin count OC-768 packaged electronic components such as limiting amplifier and modulator driver, conventional microwave package technology has been successfully adapted.  High pin count components such as CDR/De-Mux and CMU/Mux pose additional challenges due to the incompatibility between the large number of pins and conventional microwave package technology. The already challenging electrical requirements of high pin count OC-768 packages are further complicated by the constraints imposed by demanding thermal management, available production assembly processes, achievable mechanical tolerances, and environmental considerations. The successful development of a high pin count 40Gbs package is essentially an integrated solution to the above challenges to ensure a functional, manufacturability, yet cost effective product. The presentation will briefly introduce Finisar commercial available 40G products, RF and packaging design and their challenges.

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